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A500_ACCEL_RAM_IDE-Rev-2 github

Improved design attempt for Amiga 500 in socket 68000 Accelerator, FastRAM and IDE Interface

Open PR77/A500_ACCEL_RAM_IDE-Rev-2 on github

Platforms
AmigaOS 3 / 68kClassic hardware
Kind
hardware
Language
Verilog
License
GPL-3.0
Stars / forks
55 / 5
Created
8 years ago
Last push
4 months ago
Topics
accelerator amiga cpld fastram ide mc68000
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