A500_ACCEL_RAM_IDE-Rev-1 github

Initial design attempt for Amiga 500 in socket 68000 Accelerator, FastRAM and IDE Interface

Open PR77/A500_ACCEL_RAM_IDE-Rev-1 on github

Platforms: AmigaOS 3 / 68kClassic hardware
Kind: hardware
Language: Verilog
License: GPL-3.0
Stars / forks: 14 / 2
Created: 8 years ago
Last push: 8 years ago
Topics: accelerator amiga cpld fastram mc68000

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